Memory subsystems
BOTTLENECKSK hynix captures the highest HBM margins and only two other firms supply the bandwidth-constrained stacks that throttle model size.
Memory hierarchy from HBM stacked on accelerators through server DRAM, CXL expanders, and experimental persistent memory. Bandwidth and capacity constraints directly throttle model size and training throughput. SK hynix captures highest HBM margin; Samsung and Micron compete on DRAM and next-gen HBM4.
All memory technologies used in AI accelerator and server platforms, from HBM co-packaged with the GPU through server DRAM, CXL memory expanders, and emerging non-volatile memory.
What the evidence shows
In Q1 2026, Samsung led DRAM with 38% share, followed by SK hynix at 29%.
counterpointresearch.comThree companies control 95% of DRAM production and 85% of NAND flash capacity.
pandaperspectives.substack.comWho controls it
No independently verified market-size figure is published for this node yet.
Where it sits in the stack
Takes in: DRAM wafers, TSV processing (L5), CoWoS interposer (L5)
Sends on: On-package GPU memory (HBM), server DRAM DIMMs, CXL memory modules
Related nodes
Full scorecard, owner shares, supply edges and the full tracked roster are in the desk letter.
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