High-NA EUV (0.55 NA)

Why the concentration exists

High-NA EUV lithography increases the numerical aperture from 0.33 in standard EUV systems to 0.55, which enables a resolution of 8 nanometers. This 67% improvement in numerical aperture allows features 1.7 times smaller and transistor densities 2.9 times higher than possible with previous EUV systems. The technology is designed to support chip manufacturing at nodes below 2 nanometers.[6][23][25][30][33]

The higher numerical aperture requires anamorphic optics that increase demagnification from 4× to 8× in only one direction. This design change reduces the wafer exposure field to 26 mm × 16.5 mm, which is half the size of the 26 mm × 33 mm field in standard EUV systems. The smaller field necessitates stitching multiple exposures together for larger chip designs.[1][5][16][25]

ASML is the sole provider of EUV lithography machines, and High-NA systems cost between $350 million and $400 million each. A single High-NA EUV machine takes roughly one and a half years to build, test, and qualify before delivery. The projection optics alone weigh around twelve tons and comprise more than 40,000 parts.[10][14][20][26][29][32]

What the evidence shows

Who supplies it

ASML produces only five to six High-NA EUV units annually, which constrains the supply available to chipmakers. The company has delivered the TWINSCAN EXE:5000 as its first High-NA system and the EXE:5200B as its second-generation platform. ASML shipped the first modules of a High-NA EUV system to Intel in December 2023.[14][19][22][23][24]

ZEISS supplies the illumination and projection optics for High-NA EUV systems in partnership with ASML. The illumination system weighs around six tons and consists of more than 25,000 parts. ZEISS SMT will enable the semiconductor industry to produce next-generation microchips using High-NA EUV lithography from 2026 onwards.[1][3][32]

Lasertec is developing a new actinic blank inspection system for High-NA EUV with sensitivities of 1 nm × 30 nm. Imec operates a joint High-NA EUV Lithography Lab with ASML in Veldhoven, the Netherlands, which opened on June 3, 2024. The lab supports ecosystem collaboration among chip manufacturers, equipment suppliers, material suppliers, and metrology experts.[8][19]

What it depends on, and what depends on it

High-NA EUV systems use a CO2 laser that is amplified to roughly 20,000 watts and fired at tin droplets approximately the size of a blood cell. The laser strikes 50,000 droplets per second to generate extreme ultraviolet light for patterning. The reticle stage in the EXE platform accelerates at 32 g, which is equivalent to a race car accelerating from 0 to 100 km/h in 0.09 seconds.[26]

Intel became the first company to use High-NA EUV in high-volume manufacturing, producing select layers of Intel Core Ultra Series 3 processors code-named Panther Lake on its 18A node. Intel has installed two High-NA EUV lithography machines and processed over 30,000 wafers across both tools. The company raised its order from one unit to two as of October 2, 2025.[11][13][14][22][27][28]

SK hynix assembled the industry's first High-NA EUV lithography system for mass production at its M16 fabrication plant in Icheon, South Korea, using ASML's TWINSCAN EXE:5200B. SK hynix is expected to use two High-NA EUV scanners for its memory operations. TSMC is taking a cautious approach to adopting High-NA EUV equipment, while Samsung is weighing equipment spending against the need to restore foundry profitability.[2][4][18][33]

Where it sits in the stack

What would break it

Low-NA double patterning offers a readily available alternative to High-NA EUV by performing two exposures with a low-NA EUV tool to print a single layer. This technique is already in use by some chipmakers at leading nodes. A single High-NA EUV exposure costs roughly 2.5 times more than a single low-NA EUV exposure, which affects the economic calculus for adoption.[7][13][17]

High-NA EUV introduces three new technical problems that low-NA EUV does not have: reduced depth of focus, a smaller wafer exposure field, and central obscuration that limits some dense line pitches. The industry has been researching alternative resist chemistries, but no universally accepted successor to conventional chemically amplified resists has emerged. Chemically amplified resists absorb EUV poorly, requiring a relatively thick layer to capture an adequate dose.[1][5][9][16]

China has developed a prototype High-NA EUV lithography machine in Shenzhen that was partly built from reused equipment bought through middlemen. This development has affected the secondhand market for lithography tools. The Dutch government previously prevented ASML from shipping an EUV machine to China in November 2019.[10][21]

What to watch

Intel plans to use High-NA EUV for its 14A node, with risk production starting in 2027 and mass production expected in 2028. Intel has ordered six High-NA EUV tools costing $2 billion total, with a dozen machines needed per fab for full High-NA EUV deployment. The company's first two High-NA EUV machines can produce approximately 30,000 wafers per quarter.[4][12][14][16][31]

ASML's EXE:5200B delivers 175 wafers per hour, representing a 60% productivity boost over the EXE:5000's throughput. The EXE platform roadmap targets an increase to 220 wafers per hour in 2025. Intel completed acceptance testing of the EXE:5200B system in December 2025.[12][24][28]

Intel has proposed a 6 × 12 inch mask format that would improve scanner productivity by 23% to 50%, compared to the current 6 × 6 inch standard. ASML has stated that a larger mask may be introduced early in the next decade. Imec announced a partnership with Mitsui Chemicals around carbon nanotube pellicles for High-NA EUV development.[15][17]

Related nodes

Sources

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