Leading-edge memory fabs - DRAM and HBM
BOTTLENECKThree firms produce HBM with complex TSV stacking, and their limited wafer capacity directly constrains AI accelerator shipments.
Fabs producing DRAM and high-bandwidth memory (HBM) with through-silicon via stacking for AI accelerators. HBM supply constrains GPU and AI chip output; capacity is ~23% of total DRAM wafers by 2026. Samsung, SK Hynix, and Micron capture 5-8x pricing premium over commodity DRAM.
Fabs producing commodity DRAM and high-bandwidth memory (HBM) on leading nodes (1-beta/1-gamma DRAM); HBM base-die and buffer-die fabrication includes through-silicon via (TSV) processing.
What the evidence shows
Building leading-edge DRAM fabs requires multi-year construction and lengthy ramp-up before volume production.
newsletter.semianalysis.comHigh-end HBM supply is constrained by process, packaging, and yield factors, making rapid ramp-up difficult.
finance.biggo.comWho controls it
Where it sits in the stack
Takes in: Silicon wafer, specialty etch and deposition gases, TSV process chemicals
Sends on: DRAM die (commodity) or HBM base-die/buffer-die (via TSV process)
Related nodes
Full scorecard, owner shares, supply edges and the full tracked roster are in the desk letter.
GET THE BRIEFING